![]() ![]() This thesis not only provides a successful synthesis of a face detection system on a hardware accelerator but also ignites intriguing ideas in terms of improvement aspects, such as approximating the design for finding an optimal energy-quality tradeoff corresponding to different applications as our future work. Furthermore, the design details of the components of the structure, such as the generation of an integral image, multiple pipelined classifiers, as well as the parallel processing, are discussed in this work, in order to provide a potential improvement for the future work. Additionally, the power consumption of the implementation is 714 mW, including 15\% as the static cost and 85\% as the dynamic power dissipation. Compared with the prior work on the Altera platform proposed in, our work reduces the slice count by 1018. We present a synthesis of the well-known Viola-Jones face detection algorithm on Xilinx software and platform - Vivado and FPGA as Nexys 4 Artix-7 device, due to hardware accelerators' fast computation ability. To enhance it even further, we also propose third computing device which is a hardware accelerator. Although the results from the Raspberry Pi and general purpose CPU show drastic improvement, our expectations were more than that from the systems. Experimental results prove that using the phenomena of edge computing also known as fog computing demonstrates an improvement in computation speed and data privacy. ![]() The BLE Mesh System has one master and three slave devices while the Security Monitoring System has a Passive Infrared Sensor (PIR) and a webcam to detect motion. ![]() More specifically, the hardware computes data from – 1) a non-standardized Bluetooth Low Energy (BLE) Mesh System, and 2) a Security Monitoring System. ![]() Second, the hardware processors are connected to a server which can manipulate the entire system and also possess storage capacity to save the system’s important data and log files. First of all, we improve computation time by integrating the idea of edge computing on Raspberry Pi, CPU, and Field Programmable Gate Array (FPGA) which processes different algorithms. This thesis presents a hardware architecture, IoT-Edge-Server, of a diverse embedded system combining the applications of a smart city, smart building, or smart agricultural farm. ![]()
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